URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog] - Rev 334

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
334	Minor fixes for Icarus simulator.	igorm	7178d 08h	/ethmac/branches/unneback/bench/verilog
331	Tests for delayed CRC and defer indication added.	igorm	7207d 03h	/ethmac/branches/unneback/bench/verilog
318	Latest Ethernet IP core testbench.	tadejm	7539d 00h	/ethmac/branches/unneback/bench/verilog
315	Updated testbench. Some more testcases, some repaired.	tadejm	7651d 03h	/ethmac/branches/unneback/bench/verilog
302	mbist signals updated according to newest convention	markom	7700d 08h	/ethmac/branches/unneback/bench/verilog
299	Artisan RAMs added.	mohor	7758d 04h	/ethmac/branches/unneback/bench/verilog
286	Define file in eth_cop.v is changed to eth_defines.v. Some defines were moved from tb_eth_defines.v to eth_defines.v.	mohor	7826d 04h	/ethmac/branches/unneback/bench/verilog
281	Tests test_mac_full_duplex_receive 4-7 fixed to proper BD.	mohor	7959d 00h	/ethmac/branches/unneback/bench/verilog
279	Underrun test fixed. Many other tests fixed.	mohor	7960d 02h	/ethmac/branches/unneback/bench/verilog
274	Backup version. Not fully working.	tadejm	7967d 20h	/ethmac/branches/unneback/bench/verilog
267	Full duplex control frames tested.	mohor	8023d 23h	/ethmac/branches/unneback/bench/verilog
266	Flow control test almost finished.	mohor	8028d 22h	/ethmac/branches/unneback/bench/verilog
263	test_mac_full_duplex_flow_control tests pretty much finished. TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL FRM. AT 4 TX BD ( 10Mbps ) finished. TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION TURNED OFF AT ONE RX BD ( 10Mbps ) finished.	mohor	8029d 14h	/ethmac/branches/unneback/bench/verilog
260	test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame finished.	mohor	8030d 02h	/ethmac/branches/unneback/bench/verilog
254	Temp version.	mohor	8031d 19h	/ethmac/branches/unneback/bench/verilog
252	Just some updates.	tadejm	8031d 22h	/ethmac/branches/unneback/bench/verilog
243	Late collision is not reported any more.	tadejm	8037d 03h	/ethmac/branches/unneback/bench/verilog
227	Changed BIST scan signals.	tadejm	8063d 23h	/ethmac/branches/unneback/bench/verilog
223	Some code changed due to bug fixes.	tadejm	8064d 02h	/ethmac/branches/unneback/bench/verilog
216	Bist signals added.	mohor	8071d 02h	/ethmac/branches/unneback/bench/verilog

1 2 Next >

Show All

Browse

Tools

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [bench/] [verilog] - Rev 334

Filtering Options