OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] [rtl/] [verilog/] [eth_macstatus.v] - Rev 361

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
361 created branch unneback unneback 5024d 18h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
352 Removed delayed assignments from rtl code olof 5035d 19h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
346 Updated project location olof 5046d 12h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
338 root 5850d 14h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
335 New directory structure. root 5907d 19h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
333 Some small fixes + some troubles fixed. igorm 7356d 09h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
325 Defer indication fixed. igorm 7384d 19h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
276 Defer indication changed. tadejm 8137d 16h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.		 mohor 8207d 04h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 8215d 07h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 8277d 15h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
146 CarrierSenseLost status is not set when working in loopback mode. mohor 8285d 11h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
126 InvalidSymbol generation changed. mohor 8326d 11h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8420d 16h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
70 Small fixes. mohor 8483d 19h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
64 Status was not written correctly when frames were discarted because of
address mismatch.		 mohor 8486d 12h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
43 Tx status is written back to the BD. mohor 8490d 20h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
42 Rx status is written back to the BD. mohor 8493d 13h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
37 Link in the header changed. mohor 8509d 19h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.		 mohor 8605d 21h /ethmac/branches/unneback/rtl/verilog/eth_macstatus.v

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.