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[/] [ethmac/] [tags/] [asyst_2] - Rev 127

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Rev	Log message	Author	Age	Path
127	WriteRxDataToMemory signal changed so end of frame (when last word is written to fifo) is changed.	mohor	8049d 23h	/ethmac/tags/asyst_2
126	InvalidSymbol generation changed.	mohor	8049d 23h	/ethmac/tags/asyst_2
125	RxAbort changed. Packets received with MRxErr (from PHY) are also aborted.	mohor	8049d 23h	/ethmac/tags/asyst_2
124	Define ETH_MIIMODER_RST corrected to 0x00000400.	mohor	8050d 00h	/ethmac/tags/asyst_2
122	ethernet spram added. So far a generic ram and xilinx RAMB4 are used.	mohor	8052d 01h	/ethmac/tags/asyst_2
121	gsr added for use when ETH_XILINX_RAMB4 define is set.	mohor	8052d 01h	/ethmac/tags/asyst_2
120	Unused files removed.	mohor	8052d 02h	/ethmac/tags/asyst_2
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	8052d 02h	/ethmac/tags/asyst_2
118	ShiftEnded synchronization changed.	mohor	8055d 17h	/ethmac/tags/asyst_2
117	Clock mrx_clk set to 2.5 MHz.	mohor	8056d 04h	/ethmac/tags/asyst_2
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	8056d 04h	/ethmac/tags/asyst_2
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	8057d 01h	/ethmac/tags/asyst_2
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	8057d 23h	/ethmac/tags/asyst_2
113	RxPointer bug fixed.	mohor	8064d 15h	/ethmac/tags/asyst_2
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	8065d 04h	/ethmac/tags/asyst_2
111	Master state machine had a bug when switching from master write to master read.	mohor	8065d 18h	/ethmac/tags/asyst_2
110	m_wb_cyc_o signal released after every single transfer.	mohor	8065d 21h	/ethmac/tags/asyst_2
109	Comment removed.	mohor	8065d 21h	/ethmac/tags/asyst_2
108	Testbench supports unaligned accesses.	mohor	8133d 07h	/ethmac/tags/asyst_2
107	TX_BUF_BASE changed.	mohor	8133d 07h	/ethmac/tags/asyst_2

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[/] [ethmac/] [tags/] [asyst_2] - Rev 127

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