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[/] [ethmac/] [tags/] [rel_10/] [rtl/] [verilog/] [eth_spram_256x32.v] - Rev 352

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Rev Log message Author Age Path
338 root 5569d 12h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
335 New directory structure. root 5626d 18h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
247 This commit was manufactured by cvs2svn to create tag 'rel_10'. 7932d 13h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
227 Changed BIST scan signals. tadejm 7960d 11h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
210 BIST added. mohor 7968d 11h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7985d 09h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 8047d 11h /ethmac/tags/rel_10/rtl/verilog/eth_spram_256x32.v

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