OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_16] - Rev 183

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
183 Modelsim environment added. mohor 7952d 04h /ethmac/tags/rel_16
182 Full duplex test improved. tadej 7953d 04h /ethmac/tags/rel_16
181 MIIM test look better. mohor 7953d 07h /ethmac/tags/rel_16
180 Bench outputs data to display every 128 bytes. mohor 7956d 03h /ethmac/tags/rel_16
179 Beautiful tests merget together mohor 7956d 03h /ethmac/tags/rel_16
178 Rearanged testcases mohor 7956d 03h /ethmac/tags/rel_16
177 Bug in MIIM fixed. mohor 7956d 07h /ethmac/tags/rel_16
176 lists changed to new directory structure mohor 7956d 09h /ethmac/tags/rel_16
175 Script fixed to new dir structure mohor 7956d 09h /ethmac/tags/rel_16
174 Directory keeper mohor 7956d 09h /ethmac/tags/rel_16
173 Keeps the directory mohor 7956d 09h /ethmac/tags/rel_16
172 NCSIM simulation environment added to cvs mohor 7956d 09h /ethmac/tags/rel_16
171 NCSIM simulation environment added. mohor 7956d 09h /ethmac/tags/rel_16
170 Headers changed. mohor 7956d 10h /ethmac/tags/rel_16
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7956d 10h /ethmac/tags/rel_16
168 CarrierSenseLost bug fixed when operating in full duplex mode. mohor 7957d 07h /ethmac/tags/rel_16
167 Sometimes both RxB_IRQ and RxE_IRQ were activated. Bug fixed. mohor 7958d 08h /ethmac/tags/rel_16
166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.		 mohor 7959d 08h /ethmac/tags/rel_16
165 HASH improvement needed. mohor 7959d 11h /ethmac/tags/rel_16
164 Ethernet debug registers removed. mohor 7959d 11h /ethmac/tags/rel_16

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.