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[/] [ethmac/] [tags/] [rel_20] - Rev 84

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Rev Log message Author Age Path
84 LinkFail signal was not latching appropriate bit. mohor 8202d 14h /ethmac/tags/rel_20
83 MAC address recognition was not correct (bytes swaped). mohor 8202d 14h /ethmac/tags/rel_20
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8202d 16h /ethmac/tags/rel_20
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8202d 16h /ethmac/tags/rel_20
80 Small fixes for external/internal DMA missmatches. mohor 8206d 18h /ethmac/tags/rel_20
79 RetryCntLatched was unused and removed from design mohor 8206d 19h /ethmac/tags/rel_20
78 WB_SEL_I was unused and removed from design mohor 8206d 19h /ethmac/tags/rel_20
77 Interrupts changed mohor 8206d 19h /ethmac/tags/rel_20
76 Interrupts changed in the top file mohor 8206d 19h /ethmac/tags/rel_20
75 r_Bro is used for accepting/denying frames mohor 8206d 19h /ethmac/tags/rel_20
74 Reset values are passed to registers through parameters mohor 8206d 19h /ethmac/tags/rel_20
73 Number of interrupts changed mohor 8206d 19h /ethmac/tags/rel_20
72 Retry is not activated when a Tx Underrun occured mohor 8210d 22h /ethmac/tags/rel_20
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8215d 00h /ethmac/tags/rel_20
70 Small fixes. mohor 8215d 01h /ethmac/tags/rel_20
69 Define missmatch fixed. mohor 8215d 22h /ethmac/tags/rel_20
68 Registered trimmed. Unused registers removed. mohor 8216d 21h /ethmac/tags/rel_20
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8216d 22h /ethmac/tags/rel_20
66 Testbench fixed, code simplified, unused signals removed. mohor 8217d 04h /ethmac/tags/rel_20
65 Testbench fixed, code simplified, unused signals removed. mohor 8217d 04h /ethmac/tags/rel_20

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