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[/] [ethmac/] [tags/] [rel_25] - Rev 216

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Rev Log message Author Age Path
216 Bist signals added. mohor 7922d 17h /ethmac/tags/rel_25
215 Bist supported. mohor 7922d 18h /ethmac/tags/rel_25
214 Signals for WISHBONE B3 compliant interface added. mohor 7923d 13h /ethmac/tags/rel_25
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7923d 13h /ethmac/tags/rel_25
212 Minor $display change. mohor 7923d 14h /ethmac/tags/rel_25
211 Bist added. mohor 7923d 14h /ethmac/tags/rel_25
210 BIST added. mohor 7923d 14h /ethmac/tags/rel_25
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7924d 17h /ethmac/tags/rel_25
208 Virtual Silicon RAMs moved to lib directory tadej 7940d 11h /ethmac/tags/rel_25
207 Virtual Silicon RAM support fixed tadej 7940d 11h /ethmac/tags/rel_25
206 Virtual Silicon RAM added to the simulation. mohor 7940d 11h /ethmac/tags/rel_25
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7940d 12h /ethmac/tags/rel_25
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7940d 12h /ethmac/tags/rel_25
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 7940d 12h /ethmac/tags/rel_25
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 7943d 13h /ethmac/tags/rel_25
201 Core size added to the document. mohor 7943d 14h /ethmac/tags/rel_25
200 File with lower case checked in instead. mohor 7943d 14h /ethmac/tags/rel_25
199 Datasheet name changed to lower case name. mohor 7943d 14h /ethmac/tags/rel_25
198 Removed file. File with name in lower case will be added instead. mohor 7943d 14h /ethmac/tags/rel_25
197 Ethernet Data Sheet. mohor 7943d 14h /ethmac/tags/rel_25

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