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[/] [ethmac/] [tags/] [rel_26] - Rev 127

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Rev Log message Author Age Path
127 WriteRxDataToMemory signal changed so end of frame (when last word is
written to fifo) is changed.		 mohor 8008d 21h /ethmac/tags/rel_26
126 InvalidSymbol generation changed. mohor 8008d 21h /ethmac/tags/rel_26
125 RxAbort changed. Packets received with MRxErr (from PHY) are also
aborted.		 mohor 8008d 21h /ethmac/tags/rel_26
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 8008d 22h /ethmac/tags/rel_26
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 8010d 22h /ethmac/tags/rel_26
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 8010d 22h /ethmac/tags/rel_26
120 Unused files removed. mohor 8011d 00h /ethmac/tags/rel_26
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8011d 00h /ethmac/tags/rel_26
118 ShiftEnded synchronization changed. mohor 8014d 14h /ethmac/tags/rel_26
117 Clock mrx_clk set to 2.5 MHz. mohor 8015d 01h /ethmac/tags/rel_26
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 8015d 01h /ethmac/tags/rel_26
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8015d 23h /ethmac/tags/rel_26
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8016d 20h /ethmac/tags/rel_26
113 RxPointer bug fixed. mohor 8023d 12h /ethmac/tags/rel_26
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8024d 02h /ethmac/tags/rel_26
111 Master state machine had a bug when switching from master write to
master read.		 mohor 8024d 15h /ethmac/tags/rel_26
110 m_wb_cyc_o signal released after every single transfer. mohor 8024d 18h /ethmac/tags/rel_26
109 Comment removed. mohor 8024d 19h /ethmac/tags/rel_26
108 Testbench supports unaligned accesses. mohor 8092d 05h /ethmac/tags/rel_26
107 TX_BUF_BASE changed. mohor 8092d 05h /ethmac/tags/rel_26

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