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[/] [ethmac/] [tags/] [rel_4] - Rev 114

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Rev Log message Author Age Path
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7998d 23h /ethmac/tags/rel_4
113 RxPointer bug fixed. mohor 8005d 15h /ethmac/tags/rel_4
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8006d 05h /ethmac/tags/rel_4
111 Master state machine had a bug when switching from master write to
master read.		 mohor 8006d 18h /ethmac/tags/rel_4
110 m_wb_cyc_o signal released after every single transfer. mohor 8006d 21h /ethmac/tags/rel_4
109 Comment removed. mohor 8006d 22h /ethmac/tags/rel_4
108 Testbench supports unaligned accesses. mohor 8074d 08h /ethmac/tags/rel_4
107 TX_BUF_BASE changed. mohor 8074d 08h /ethmac/tags/rel_4
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8074d 08h /ethmac/tags/rel_4
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8083d 09h /ethmac/tags/rel_4
104 FCS should not be included in NibbleMinFl. mohor 8085d 03h /ethmac/tags/rel_4
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8085d 04h /ethmac/tags/rel_4
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8085d 04h /ethmac/tags/rel_4
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8085d 04h /ethmac/tags/rel_4
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8085d 04h /ethmac/tags/rel_4
99 Document revised. mohor 8092d 03h /ethmac/tags/rel_4
98 Document revised. mohor 8092d 04h /ethmac/tags/rel_4
97 Small typo fixed. lampret 8109d 02h /ethmac/tags/rel_4
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8113d 02h /ethmac/tags/rel_4
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8113d 05h /ethmac/tags/rel_4

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