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[/] [ethmac/] [tags/] [runing_under_uclinux/] [rtl/] [verilog/] [eth_defines.v] - Rev 338

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Rev	Log message	Author	Age	Path
338		root	5511d 14h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
335	New directory structure.	root	5568d 20h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
144	This commit was manufactured by cvs2svn to create tag 'runing_under_uclinux'.		7962d 14h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
137	Defines for register width added. mii_rst signal in MIIMODER register changed.	mohor	7965d 08h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
134	Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No need to multiply or devide any more.	mohor	7967d 10h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	7989d 14h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8070d 20h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
105	Compiler directives added. Tx and Rx fifo size incremented. A "late collision" bug fixed.	mohor	8079d 21h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
92	Some defines that are used in testbench only were moved to tb_eth_defines.v file.	mohor	8115d 17h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
73	Number of interrupts changed	mohor	8136d 14h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
68	Registered trimmed. Unused registers removed.	mohor	8146d 16h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8146d 17h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
55	Changed that were lost with last update put back to the file.	mohor	8147d 19h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
52	Modified for Address Checking, addition of eth_addrcheck.v	billditt	8148d 09h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
46	HASH0 and HASH1 registers added.	mohor	8150d 13h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
42	Rx status is written back to the BD.	mohor	8154d 13h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
40	Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200 MHz. Statuses, overrun, control frame transmission and reception still need to be fixed.	mohor	8157d 13h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
37	Link in the header changed.	mohor	8170d 19h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
34	RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors instead of the number of RX descriptors).	mohor	8219d 15h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v
32	ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead.	mohor	8219d 19h	/ethmac/tags/runing_under_uclinux/rtl/verilog/eth_defines.v

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[/] [ethmac/] [tags/] [runing_under_uclinux/] [rtl/] [verilog/] [eth_defines.v] - Rev 338

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