URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog] - Rev 19

Rev	Log message	Author	Age	Path
19	- latency 10 addsub	robfinch	1989d 17h	/ft816float/trunk/rtl/verilog
18	- sigmoid function	robfinch	1991d 11h	/ft816float/trunk/rtl/verilog
16	- added reciprocal square root estimate	robfinch	1991d 11h	/ft816float/trunk/rtl/verilog
15	- added reciprocal estimate	robfinch	1992d 23h	/ft816float/trunk/rtl/verilog
14	- added Goldschmidt divider	robfinch	2231d 21h	/ft816float/trunk/rtl/verilog
13	- fix sticky bit position	robfinch	2474d 23h	/ft816float/trunk/rtl/verilog
12	- added square root	robfinch	2476d 13h	/ft816float/trunk/rtl/verilog
11	- fix multiply NaN	robfinch	2478d 13h	/ft816float/trunk/rtl/verilog
10	- fp updated - test benches and vectors	robfinch	2479d 00h	/ft816float/trunk/rtl/verilog
9	- added sample FP unit	robfinch	2902d 00h	/ft816float/trunk/rtl/verilog
8	Updated better support for 80 bit / 128 bit ops	robfinch	2902d 00h	/ft816float/trunk/rtl/verilog
7	adding missing reduction or function	robfinch	3053d 09h	/ft816float/trunk/rtl/verilog
6	added more fp ops	robfinch	3159d 16h	/ft816float/trunk/rtl/verilog
5	added floattoint inttofloat	robfinch	3161d 08h	/ft816float/trunk/rtl/verilog
3	FT816Float - initial zrchive	robfinch	3632d 17h	/ft816float/trunk/rtl/verilog