URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog] - Rev 22

Rev	Log message	Author	Age	Path
22	- fused multiply add	robfinch	1857d 16h	/ft816float/trunk/rtl/verilog
21	- trunc function	robfinch	1858d 04h	/ft816float/trunk/rtl/verilog
20	- fix nan propagation	robfinch	1859d 11h	/ft816float/trunk/rtl/verilog
19	- latency 10 addsub	robfinch	1859d 11h	/ft816float/trunk/rtl/verilog
18	- sigmoid function	robfinch	1861d 05h	/ft816float/trunk/rtl/verilog
16	- added reciprocal square root estimate	robfinch	1861d 05h	/ft816float/trunk/rtl/verilog
15	- added reciprocal estimate	robfinch	1862d 17h	/ft816float/trunk/rtl/verilog
14	- added Goldschmidt divider	robfinch	2101d 15h	/ft816float/trunk/rtl/verilog
13	- fix sticky bit position	robfinch	2344d 17h	/ft816float/trunk/rtl/verilog
12	- added square root	robfinch	2346d 07h	/ft816float/trunk/rtl/verilog
11	- fix multiply NaN	robfinch	2348d 07h	/ft816float/trunk/rtl/verilog
10	- fp updated - test benches and vectors	robfinch	2348d 18h	/ft816float/trunk/rtl/verilog
9	- added sample FP unit	robfinch	2771d 18h	/ft816float/trunk/rtl/verilog
8	Updated better support for 80 bit / 128 bit ops	robfinch	2771d 18h	/ft816float/trunk/rtl/verilog
7	adding missing reduction or function	robfinch	2923d 04h	/ft816float/trunk/rtl/verilog
6	added more fp ops	robfinch	3029d 10h	/ft816float/trunk/rtl/verilog
5	added floattoint inttofloat	robfinch	3031d 02h	/ft816float/trunk/rtl/verilog
3	FT816Float - initial zrchive	robfinch	3502d 11h	/ft816float/trunk/rtl/verilog