URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog] - Rev 25

Rev	Log message	Author	Age	Path
25	- FMA improved accuracy	robfinch	1884d 17h	/ft816float/trunk/rtl/verilog
24	- fix infinity	robfinch	1884d 22h	/ft816float/trunk/rtl/verilog
23	- better test data for FMA	robfinch	1884d 22h	/ft816float/trunk/rtl/verilog
22	- fused multiply add	robfinch	1885d 00h	/ft816float/trunk/rtl/verilog
21	- trunc function	robfinch	1885d 12h	/ft816float/trunk/rtl/verilog
20	- fix nan propagation	robfinch	1886d 19h	/ft816float/trunk/rtl/verilog
19	- latency 10 addsub	robfinch	1886d 19h	/ft816float/trunk/rtl/verilog
18	- sigmoid function	robfinch	1888d 14h	/ft816float/trunk/rtl/verilog
16	- added reciprocal square root estimate	robfinch	1888d 14h	/ft816float/trunk/rtl/verilog
15	- added reciprocal estimate	robfinch	1890d 02h	/ft816float/trunk/rtl/verilog
14	- added Goldschmidt divider	robfinch	2128d 23h	/ft816float/trunk/rtl/verilog
13	- fix sticky bit position	robfinch	2372d 01h	/ft816float/trunk/rtl/verilog
12	- added square root	robfinch	2373d 16h	/ft816float/trunk/rtl/verilog
11	- fix multiply NaN	robfinch	2375d 15h	/ft816float/trunk/rtl/verilog
10	- fp updated - test benches and vectors	robfinch	2376d 02h	/ft816float/trunk/rtl/verilog
9	- added sample FP unit	robfinch	2799d 02h	/ft816float/trunk/rtl/verilog
8	Updated better support for 80 bit / 128 bit ops	robfinch	2799d 03h	/ft816float/trunk/rtl/verilog
7	adding missing reduction or function	robfinch	2950d 12h	/ft816float/trunk/rtl/verilog
6	added more fp ops	robfinch	3056d 19h	/ft816float/trunk/rtl/verilog
5	added floattoint inttofloat	robfinch	3058d 10h	/ft816float/trunk/rtl/verilog