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[/] [ha1588] - Rev 33

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33 Redefined memory map. RTC and TSU now have separate address spans, can be easily divided into to independent modules. edn_walter 4480d 18h /ha1588
32 Added PTP standard time format output to the top module. Can be connected to external modules. edn_walter 4480d 21h /ha1588
31 Added hand-shaking for the TSU data reading. edn_walter 4481d 14h /ha1588
30 Timestamp format in the queue = msgId_4bit + seqId_16bit + null_8bit + timeStamp1s_4bit + null_2bit + timeStamp1ns_30bit edn_walter 4481d 14h /ha1588
29 Added multicycle timing constraint to ptp_parser.v, which works at data rate of (32bit * 4 gmii_clk cycle). Fmax can exceed 250MHz. edn_walter 4481d 14h /ha1588
28 Before changing TSU packet parser datapath width from 32b to 8b. edn_walter 4481d 20h /ha1588
27 Added more bits to the TSU queue information, of which timestamp value is enlarged from 4s to 64s. edn_walter 4481d 21h /ha1588
26 Updated test case. edn_walter 4483d 16h /ha1588
25 Updated SOPC Builder component and example system. edn_walter 4484d 14h /ha1588
24 Added test cases for top-level testbench to cover both RTC and TSU. edn_walter 4484d 16h /ha1588
23 Added CDC hand-shaking for RTC time reading operation. edn_walter 4485d 10h /ha1588
22 RTC reset will clear ACC counter, but not clear ACC counter incremental. edn_walter 4485d 14h /ha1588
21 Added structure for top-level simulation. Systemverilog DPI will be used to emulate the SW operation of PTP application. edn_walter 4486d 11h /ha1588
20 Added SOPC Builder Component and Instantiation Example. Follow rtl/sopc/ReadMe.txt to add IP Search Path to SOPC Builder. edn_walter 4490d 15h /ha1588
19 Added pipeline registers to Real Time Clock module to improve timing. edn_walter 4490d 15h /ha1588
18 Added QuartusII Place and Route project for top level ha1588.v edn_walter 4490d 15h /ha1588
17 Updated reg.v content. edn_walter 4491d 09h /ha1588
16 Try to add sth. edn_walter 4495d 01h /ha1588
15 Renamed module name for tsu and rtc.
Added folder for reg and top.
Added folder for sopc, preparing for Altera SOPC Builder customized component.		 edn_walter 4497d 10h /ha1588
14 Added test case support for UDP/IPv6 PTP frames. edn_walter 4499d 10h /ha1588

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