URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [bench/] [verilog/] [tst_bench_top.v] - Rev 25

Rev	Log message	Author	Age	Path
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7887d 21h	/i2c/trunk/bench/verilog/tst_bench_top.v
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8115d 04h	/i2c/trunk/bench/verilog/tst_bench_top.v
10	Created new directory structure. Added Verilog version.	rherveille	8289d 02h	/i2c/trunk/bench/verilog/tst_bench_top.v