URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] [rtl/] [vhdl/] [i2c_master_bit_ctrl.vhd] - Rev 34

Rev	Log message	Author	Age	Path
34	Fixed a few 'arbitration lost' bugs. VHDL version only.	rherveille	7806d 18h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd
31	Core is now a Multimaster I2C controller.	rherveille	7843d 04h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd
27	Cleaned up code	rherveille	7868d 22h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7900d 02h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8037d 13h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd
15	Split i2c_master_core.vhd into separate files for each entity; same layout as verilog version. Code updated, is now up-to-date to doc. rev.0.4. Added headers.	rherveille	8259d 08h	/i2c/trunk/rtl/vhdl/i2c_master_bit_ctrl.vhd