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[/] [i2c/] [trunk] - Rev 35

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Rev Log message Author Age Path
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7807d 11h /i2c/trunk
34 Fixed a few 'arbitration lost' bugs. VHDL version only. rherveille 7811d 09h /i2c/trunk
33 Fixed a bug in the Command Register declaration. rherveille 7833d 18h /i2c/trunk
32 Multi-master capabilities added to the core. Changed documentation accordingly.
Updated some timing diagrams.		 rherveille 7843d 17h /i2c/trunk
31 Core is now a Multimaster I2C controller. rherveille 7847d 19h /i2c/trunk
30 Small code simplifications rherveille 7847d 19h /i2c/trunk
29 Core is now a Multimaster I2C controller rherveille 7847d 20h /i2c/trunk
28 *** empty log message *** rherveille 7873d 12h /i2c/trunk
27 Cleaned up code rherveille 7873d 12h /i2c/trunk
26 *** empty log message *** rherveille 7876d 20h /i2c/trunk
25 Added timing tests to i2c_model.
Updated testbench.		 rherveille 7904d 16h /i2c/trunk
24 Fixed some reported minor start/stop generation timing issuess. rherveille 7904d 16h /i2c/trunk
23 *** empty log message *** rherveille 8031d 22h /i2c/trunk
22 Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment. rherveille 8042d 03h /i2c/trunk
21 no message rherveille 8128d 04h /i2c/trunk
20 Added Appendix A rherveille 8128d 04h /i2c/trunk
19 Fixed some race conditions in the i2c-slave model.
Added debug information.
Added headers.		 rherveille 8132d 00h /i2c/trunk
18 no message rherveille 8158d 20h /i2c/trunk
17 C-include file.
Initial release		 rherveille 8247d 01h /i2c/trunk
16 Changed PRER reset value from 0x0000 to 0xffff, conform specs. rherveille 8259d 00h /i2c/trunk

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