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[/] [i2c/] [trunk] - Rev 57

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Rev Log message Author Age Path
57 fixed short scl high pulse after clock stretch
fixed slave model not returning correct '(n)ack' signal		 rherveille 6490d 08h /i2c/trunk
56 Fixed Tsu:sta timing check.
Added Thd:sta timing check.		 rherveille 7043d 06h /i2c/trunk
55 Fixed register overwrite issue.
Removed full_case pragma, replaced it by a default statement.		 rherveille 7044d 08h /i2c/trunk
54 Fixed scl, sda delay. rherveille 7044d 08h /i2c/trunk
53 Fixed previous fix :) Made a variable vs signal mistake. rherveille 7340d 06h /i2c/trunk
52 Fixed a bug where the core would signal an arbitration lost (AL bit set), when another master controls the bus and the other master generates a STOP bit. rherveille 7340d 07h /i2c/trunk
51 Fixed simulation issue when writing to CR register rherveille 7394d 07h /i2c/trunk
50 *** empty log message *** rherveille 7409d 02h /i2c/trunk
49 Added testbench rherveille 7409d 02h /i2c/trunk
48 Fixed a bug in the arbitration-lost signal generation. VHDL version only. rherveille 7410d 10h /i2c/trunk
47 Fixed a potential bug in the statemachine. During a 'stop' 2 cmd_ack signals were generated. Possibly canceling a new start command. rherveille 7419d 06h /i2c/trunk
46 Fixed slave address MSB='1' bug rherveille 7494d 07h /i2c/trunk
45 Added slave address configurability rherveille 7494d 07h /i2c/trunk
43 Fixed a bug in the timing section. Changed 'tst_scl' into 'tst_sto'. rherveille 7579d 09h /i2c/trunk
40 Fix a blocking vs. non-blocking error in the wb_dat output mux. rherveille 7589d 07h /i2c/trunk
39 Forgot an 'end if' :-/ rherveille 7609d 03h /i2c/trunk
38 Fixed a bug in the Arbitration Lost generation caused by delay on the (external) sda line.
Fixed a potential bug in the byte controller's host-acknowledge generation.		 rherveille 7612d 11h /i2c/trunk
37 Fixed a type in example 1
Changed 'RW' to 'W' in command register description.
Changed 'RW' to 'W' in transmit register description.		 rherveille 7649d 02h /i2c/trunk
36 Fixed cmd_ack generation item (no bug). rherveille 7764d 03h /i2c/trunk
35 Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles. rherveille 7797d 18h /i2c/trunk

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