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[/] [ion/] [trunk/] [src/] [opcodes/] [makefile] - Rev 229

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229 Code samples updated to use new VHDL config packages and new SoC (UART). ja_rd 4421d 20h /ion/trunk/src/opcodes/makefile
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.		 ja_rd 4748d 05h /ion/trunk/src/opcodes/makefile
189 fixed opcode test makefile: adapted to new common makefile ja_rd 4760d 13h /ion/trunk/src/opcodes/makefile
165 Added (very early draft, very incomplete) reserved opcode trap handler.
Updated opcode tester to test some emulated mips32 opcodes using the trap handler.		 ja_rd 4797d 20h /ion/trunk/src/opcodes/makefile
148 Added optional cache support to 'opcodes' test.
Updated simulation length accordingly.		 ja_rd 4804d 05h /ion/trunk/src/opcodes/makefile
110 Updated 'opcodes' code sample:
- Longer simulated time for compatibility to new cache		 ja_rd 4864d 19h /ion/trunk/src/opcodes/makefile
90 Added 'Adventure' demo to be run from the DE-1 FLASH ja_rd 4908d 15h /ion/trunk/src/opcodes/makefile
66 Code samples:
Updated all code samples to use TB2 template and new memory map		 ja_rd 4919d 05h /ion/trunk/src/opcodes/makefile
34 default data address moved to 0x80000000
makefiles and readme files updated accordingly		 ja_rd 4925d 15h /ion/trunk/src/opcodes/makefile
24 changes in simulation test benches:
Simulation length now configurable from the python script
Console output logged to file, not to modelsim's window		 ja_rd 4927d 18h /ion/trunk/src/opcodes/makefile
2 First commit (includes 'hello' demo) ja_rd 4930d 18h /ion/trunk/src/opcodes/makefile

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