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[/] [ion/] [trunk/] [vhdl] - Rev 233

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Rev Log message Author Age Path
233 Fixed top entity for De-1 demos: Bootstrap BRAM size is now taken from a constant in the obj code package. ja_rd 4279d 05h /ion/trunk/vhdl
227 Removed modules no longer used:
code_rom_pkg replaced by new package in SoC directory.
RS232 sub-modules replaced by new UART		 ja_rd 4407d 22h /ion/trunk/vhdl
226 Updated demo and test bench to use new SoC entity. ja_rd 4407d 22h /ion/trunk/vhdl
225 Added utility functions for the initialization of BRAM memories. ja_rd 4407d 22h /ion/trunk/vhdl
224 MCU entity gutted and transformed into a SoC entity
Different UART, new generics...		 ja_rd 4407d 23h /ion/trunk/vhdl
223 MCU entity renamed to SoC, moved to separate SoC directory ja_rd 4407d 23h /ion/trunk/vhdl
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4411d 22h /ion/trunk/vhdl
217 Removed another SoC file prematurely committed ja_rd 4418d 12h /ion/trunk/vhdl
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.		 ja_rd 4418d 12h /ion/trunk/vhdl
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity		 ja_rd 4418d 12h /ion/trunk/vhdl
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4418d 21h /ion/trunk/vhdl
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments		 ja_rd 4418d 21h /ion/trunk/vhdl
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4418d 21h /ion/trunk/vhdl
207 Simulation memories now modelled with shared variables and not signals.
This improves simulation speed of large programs (e.g. Adventure) by orders of magnitude		 ja_rd 4697d 17h /ion/trunk/vhdl
206 Fixed SygnalSpy function calls for compatibility with older versions of Modelsim ja_rd 4697d 17h /ion/trunk/vhdl
205 Fixed bug in test bench interface to CPU ja_rd 4718d 16h /ion/trunk/vhdl
201 Minor fixes to code comments ja_rd 4732d 16h /ion/trunk/vhdl
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface		 ja_rd 4732d 16h /ion/trunk/vhdl
194 Removed deprecated files from old TB version ja_rd 4734d 07h /ion/trunk/vhdl
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.		 ja_rd 4734d 07h /ion/trunk/vhdl

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