URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [test] - Rev 16

Rev	Log message	Author	Age	Path
16	just cosmetic	acapola	4922d 12h	/iso7816_3_master/trunk/test
15	tpdu level tasks inverse convention	acapola	4923d 10h	/iso7816_3_master/trunk/test
14	Task to send strings as bytes improved	acapola	4926d 10h	/iso7816_3_master/trunk/test
13	Corrections in analyzer to handle TDi and historical bytes in ATR and PPS todo: handle inverse convention	acapola	4927d 13h	/iso7816_3_master/trunk/test
12	pps sequence added to test bench endOfTx added to TxCore	acapola	4938d 10h	/iso7816_3_master/trunk/test
11	added BSD licence header to files	acapola	4938d 13h	/iso7816_3_master/trunk/test
10	communication direction probe added	acapola	4938d 15h	/iso7816_3_master/trunk/test
9	parity convention fixed	acapola	4944d 11h	/iso7816_3_master/trunk/test
8		acapola	4946d 10h	/iso7816_3_master/trunk/test
7	- rx/tx use "cyclesPerEtu" input - "stopBit" status bit timing fixed - analyzer: "lastByte" and "bytesCnt" functional	acapola	4947d 10h	/iso7816_3_master/trunk/test
6	analyzer added to test bench, not functional yet...	acapola	4948d 10h	/iso7816_3_master/trunk/test
5	draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself)	acapola	4949d 10h	/iso7816_3_master/trunk/test
4	Basic test bench completed for T=0: a card send ATR, reader send a command TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)	acapola	4950d 10h	/iso7816_3_master/trunk/test
3	initial draft, not functional yet	acapola	4957d 11h	/iso7816_3_master/trunk/test
2		acapola	4957d 13h	/iso7816_3_master/trunk/test