URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master] - Rev 9

Rev	Log message	Author	Age	Path
9	parity convention fixed	acapola	4938d 04h	/iso7816_3_master
8		acapola	4940d 03h	/iso7816_3_master
7	- rx/tx use "cyclesPerEtu" input - "stopBit" status bit timing fixed - analyzer: "lastByte" and "bytesCnt" functional	acapola	4941d 02h	/iso7816_3_master
6	analyzer added to test bench, not functional yet...	acapola	4942d 03h	/iso7816_3_master
5	draft of t=0 protocol analyzer (to ease debuging, and eventually as an ip itself)	acapola	4943d 03h	/iso7816_3_master
4	Basic test bench completed for T=0: a card send ATR, reader send a command TODO: add cycles/ETU management (start at 372, then adjust in case of PPS...)	acapola	4944d 03h	/iso7816_3_master
3	initial draft, not functional yet	acapola	4951d 04h	/iso7816_3_master
2		acapola	4951d 05h	/iso7816_3_master
1	The project and the structure was created	root	4952d 01h	/iso7816_3_master