OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [verilog/] [rtl/] [intr_ctrl.v] - Rev 88

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
88 Changed interrupt controller to use RST instruction instead of CALL as interrupt vector.
Some bug fixes to the c80 compiler.
motilito 4599d 05h /light8080/trunk/verilog/rtl/intr_ctrl.v
66 Adding interrupt example code to the Verilog implementation. An interrupt controller was added to the sample SOC module and a sample code was added to the "hello.c" example code. motilito 4656d 02h /light8080/trunk/verilog/rtl/intr_ctrl.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.