OpenCores
URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [verilog/] [rtl] - Rev 88

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
88 Changed interrupt controller to use RST instruction instead of CALL as interrupt vector.
Some bug fixes to the c80 compiler.
motilito 4502d 16h /light8080/trunk/verilog/rtl
68 Corrected ihex2vlog tool to enable explicit RAM declaration for Spartan 2. motilito 4543d 13h /light8080/trunk/verilog/rtl
67 Corrected bugs in the Small-C compiler. motilito 4544d 15h /light8080/trunk/verilog/rtl
66 Adding interrupt example code to the Verilog implementation. An interrupt controller was added to the sample SOC module and a sample code was added to the "hello.c" example code. motilito 4559d 13h /light8080/trunk/verilog/rtl
65 Adding Verilog initial version to the svn.
Added the c80 Small-C compiler and AS80 assembler.
motilito 4570d 20h /light8080/trunk/verilog/rtl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.