URL https://opencores.org/ocsvn/light8080/light8080/trunk

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[/] [light8080] - Rev 61

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Rev	Log message	Author	Age	Path
61	Basic demo updated: main entity name changed to keep synthesis too happy	ja_rd	4862d 11h	/light8080
60	Fixed nasty typo in pin constraints file (clock input)	ja_rd	4866d 16h	/light8080
59	tabs to spaces	ja_rd	4890d 23h	/light8080
58	tabs to spaces	ja_rd	4890d 23h	/light8080
57	removed unfinished CPM demo files	ja_rd	5075d 13h	/light8080
56	file list updated	ja_rd	5075d 13h	/light8080
55	Altair 4K Basic demo on DE-1 board	ja_rd	5075d 13h	/light8080
54	BUG FIX: XOR operations wre not clearing CY and ACY	ja_rd	5075d 13h	/light8080
53	added interrupt for single-stepping cleaned up comments a bit	ja_rd	5431d 14h	/light8080
52	test bench compilation script sanitized a little	ja_rd	5431d 14h	/light8080
51	interrupt test bench adapted to the fix in IE instruction	ja_rd	5431d 14h	/light8080
50	interrupt test bench adapted to the fix in IE instruction	ja_rd	5431d 14h	/light8080
49	fixed: IE now enables interrupts after a 1-instruction delay (it was enabling interrupts immediately)	ja_rd	5431d 14h	/light8080
48	clarification of some terms in the comments	ja_rd	5432d 06h	/light8080
47	edited the file list and added a few remarks	ja_rd	5432d 06h	/light8080
46	minor change in signal color for better readability	ja_rd	5432d 06h	/light8080
45	Added modelsim scripts for the test benches	ja_rd	5432d 06h	/light8080
44	fixed error in RST test, added support for long intr tests added a test of a 'long' intr pulse	ja_rd	5432d 06h	/light8080
43	added a remark about the TASM source format	ja_rd	5432d 06h	/light8080
42	test bench 1 regenerated with new template added a test for 'long' intr pulses	ja_rd	5432d 06h	/light8080

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Subversion Repositories light8080

[/] [light8080] - Rev 61

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