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[/] [minimips_superscalar/] [tags/] [P0] - Rev 23

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Rev Log message Author Age Path
23 Moving the benchmarks folder into the trunk folder. mcafruni 1531d 06h /minimips_superscalar/tags/P0
22 Wrong code. (fi0.bin) But revealed a bug that needs attention. mcafruni 1531d 07h /minimips_superscalar/tags/P0
19 mcafruni 1899d 11h /minimips_superscalar/tags/P0
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1899d 11h /minimips_superscalar/tags/P0
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1932d 21h /minimips_superscalar/tags/P0
15 FIR filter with 36 coefficients. mcafruni 1932d 21h /minimips_superscalar/tags/P0
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1936d 15h /minimips_superscalar/tags/P0
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1936d 15h /minimips_superscalar/tags/P0
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1936d 15h /minimips_superscalar/tags/P0
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1936d 15h /minimips_superscalar/tags/P0
10 Matrix/Vector multiplication by constant. (binary) mcafruni 1946d 14h /minimips_superscalar/tags/P0
9 Matrix/Vector multiplication by constant. mcafruni 1946d 14h /minimips_superscalar/tags/P0
8 mcafruni 1977d 12h /minimips_superscalar/tags/P0
5 6x6 Matrix multiplication (ingenuous algorithm)
msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt).
m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.		 mcafruni 1990d 09h /minimips_superscalar/tags/P0
4 It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome. mcafruni 1990d 10h /minimips_superscalar/tags/P0

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