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[/] [minimips_superscalar] - Rev 22

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22 Wrong code. (fi0.bin) But revealed a bug that needs attention. mcafruni 1573d 13h /minimips_superscalar
21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1573d 14h /minimips_superscalar
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1608d 02h /minimips_superscalar
19 mcafruni 1941d 18h /minimips_superscalar
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 1941d 18h /minimips_superscalar
17 Removing unnecessary clock-gate architecture. mcafruni 1941d 19h /minimips_superscalar
16 FIR filter with 36 coefficients. (binary to run) mcafruni 1975d 04h /minimips_superscalar
15 FIR filter with 36 coefficients. mcafruni 1975d 04h /minimips_superscalar
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1978d 22h /minimips_superscalar
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 1978d 22h /minimips_superscalar
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1978d 22h /minimips_superscalar
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 1978d 22h /minimips_superscalar
10 Matrix/Vector multiplication by constant. (binary) mcafruni 1988d 21h /minimips_superscalar
9 Matrix/Vector multiplication by constant. mcafruni 1988d 21h /minimips_superscalar
8 mcafruni 2019d 19h /minimips_superscalar
7 Uploading missing file 'pps_pf.vhd'. mcafruni 2019d 19h /minimips_superscalar
6 This is the assembly gasm modified that include a multiplication instruction which operands are 16-bit wide. mcafruni 2032d 08h /minimips_superscalar
5 6x6 Matrix multiplication (ingenuous algorithm)
msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt).
m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.		 mcafruni 2032d 16h /minimips_superscalar
4 It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome. mcafruni 2032d 16h /minimips_superscalar
3 mcafruni 2032d 17h /minimips_superscalar

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