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[/] [minsoc/] [branches/] [verilator/] [sim/] [results/] [wave.do.sav] - Rev 154

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139 Creating a verilator branche. rfajardo 4745d 22h /minsoc/branches/verilator/sim/results/wave.do.sav
109 Creating a branche for release candidate 1.0. rfajardo 4772d 12h /minsoc/branches/verilator/sim/results/wave.do.sav
2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 5540d 20h /minsoc/branches/verilator/sim/results/wave.do.sav

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