URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] - Rev 350

Rev	Log message	Author	Age	Path
350		root	5621d 19h	/mlite/trunk/vhdl
348	Added comment for 32MB and 128MB DDR parts	rhoads	5652d 15h	/trunk/vhdl
347	Xilinx ISE Project file	rhoads	5652d 15h	/trunk/vhdl
346	Support optional 4KB cache	rhoads	5689d 15h	/trunk/vhdl
345	Commented out optional mult speedup	rhoads	5693d 11h	/trunk/vhdl
344	Fixed compiler warning	rhoads	5693d 11h	/trunk/vhdl
343	Initial working cache	rhoads	5693d 11h	/trunk/vhdl
337	Initial attempt at a cache	rhoads	5698d 16h	/trunk/vhdl
335	Use enable signal for byte_we	rhoads	5740d 10h	/trunk/vhdl
334	Short time for averaging read signal for 12.5 MHz case	rhoads	5750d 09h	/trunk/vhdl
333	Updated Altera lpm_ram_dp usage for Cyclone FPGAs	rhoads	5750d 09h	/trunk/vhdl
332	Updated Altera lpm_ram_dp	rhoads	5750d 09h	/trunk/vhdl
331	Commented out unconnected signals	rhoads	5811d 10h	/trunk/vhdl
329	Fix interrupt line comment	rhoads	5902d 08h	/trunk/vhdl
288	Added Ethernet MAC with DMA	rhoads	6029d 08h	/trunk/vhdl
287	Added ethernet and flash control	rhoads	6029d 08h	/trunk/vhdl
286	Added eth_dma	rhoads	6029d 08h	/trunk/vhdl
285	Added eth_dma	rhoads	6029d 09h	/trunk/vhdl
284	Removed unsupported branch likely opcodes	rhoads	6029d 09h	/trunk/vhdl
280	Fix comment	rhoads	6046d 08h	/trunk/vhdl