URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [mult.vhd] - Rev 196

Rev	Log message	Author	Age	Path
196	Explained how to remove mult.vhd and use SW multiplication and division.	rhoads	6430d 03h	/mlite/trunk/vhdl/mult.vhd
139	Major changes -- updated to Plasma Version 3	rhoads	6792d 23h	/mlite/trunk/vhdl/mult.vhd
132	Changed "GENERIC" string to "DEFAULT" to be Xilinx friendly.	rhoads	7272d 22h	/mlite/trunk/vhdl/mult.vhd
128	Reset all registers, constants now upper case.	rhoads	7410d 09h	/mlite/trunk/vhdl/mult.vhd
121	Added Matthias Gruenewald's tri-state area-optimized option	rhoads	7571d 12h	/mlite/trunk/vhdl/mult.vhd
117	Part of Matthias Grunewald's changes to use tri-state for smaller Xilinx FPGA.	rhoads	7609d 23h	/mlite/trunk/vhdl/mult.vhd
99	correct upper 32-bits for mult(-1,-1)	rhoads	8029d 20h	/mlite/trunk/vhdl/mult.vhd
97	added documentation	rhoads	8099d 00h	/mlite/trunk/vhdl/mult.vhd
90	Now multiplies two bits at a time	rhoads	8134d 20h	/mlite/trunk/vhdl/mult.vhd
47	Altera	rhoads	8168d 23h	/mlite/trunk/vhdl/mult.vhd
45	Fixed signed 64-bit multiply	rhoads	8246d 12h	/mlite/trunk/vhdl/mult.vhd
43	Renamed M-lite to Plasma	rhoads	8248d 23h	/mlite/trunk/vhdl/mult.vhd
39	Changed name to M-lite to avoid trademark issues.	rhoads	8281d 04h	/mlite/trunk/vhdl/mult.vhd
23	Fixed div -x/y.	rhoads	8305d 21h	/mlite/trunk/vhdl/mult.vhd
18	Fixed "divu $3,$4". "Div $3,$4" still has bug if $3*$4<0.	rhoads	8307d 22h	/mlite/trunk/vhdl/mult.vhd
7	Made writes 4 cycles, improved mem_ctrl.vhd	rhoads	8323d 05h	/mlite/trunk/vhdl/mult.vhd
2	MIPS-lite CPU core	rhoads	8546d 04h	/mlite/trunk/vhdl/mult.vhd