URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk] - Rev 102

Rev	Log message	Author	Age	Path
102	permit testing mem_pause	rhoads	7896d 09h	/mlite/trunk
101	Correctly freeze the pipeline when mem_pause = '1'	rhoads	7896d 09h	/mlite/trunk
100	test mult(a,-b)	rhoads	8038d 08h	/mlite/trunk
99	correct upper 32-bits for mult(-1,-1)	rhoads	8038d 09h	/mlite/trunk
98	Fix size of GENERIC ram.	rhoads	8043d 07h	/mlite/trunk
97	added documentation	rhoads	8107d 12h	/mlite/trunk
96	Simplify take_branch	rhoads	8141d 14h	/mlite/trunk
95	register mem_write and mem_byte_sel for speed calculations	rhoads	8141d 14h	/mlite/trunk
94	Count forever	rhoads	8141d 14h	/mlite/trunk
93	make run now runs for 500 us	rhoads	8143d 08h	/mlite/trunk
92	Updated	rhoads	8143d 08h	/mlite/trunk
91	Removed unused alu_function_type entries	rhoads	8143d 08h	/mlite/trunk
90	Now multiplies two bits at a time	rhoads	8143d 08h	/mlite/trunk
89	Use address_reg instead of address_data to break timing slow down	rhoads	8143d 08h	/mlite/trunk
88	Cleanup spaces	rhoads	8143d 08h	/mlite/trunk
87	Seperated left and right shift variables	rhoads	8143d 08h	/mlite/trunk
86	Updated comment	rhoads	8143d 08h	/mlite/trunk
85	Use ADDRESS_WIDTH when decoding mem_sel	rhoads	8143d 08h	/mlite/trunk
84	Fixed comment	rhoads	8143d 08h	/mlite/trunk
83	Updated comments, accurate_timing on by default	rhoads	8143d 08h	/mlite/trunk