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[/] [mod_sim_exp/] [tags/] [Release_1.4] - Rev 64

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Rev	Log message	Author	Age	Path
64	added synthesis reports of xilinx and altera	JonasDC	4116d 11h	/mod_sim_exp/tags/Release_1.4
63	now using a generic description of the ram for the memory. the core now should synthesize for al fpga's, no device specific code anymore. tested and synthesizes for altera and xilinx	JonasDC	4116d 11h	/mod_sim_exp/tags/Release_1.4
62	not used anymore	JonasDC	4116d 14h	/mod_sim_exp/tags/Release_1.4
61	updated comments, added optional altera constraint	JonasDC	4116d 14h	/mod_sim_exp/tags/Release_1.4
60	generic version of the fifo, not device specific anymore, uses dpram_generic updated comments of RAM templates.	JonasDC	4119d 04h	/mod_sim_exp/tags/Release_1.4
59	added templates that correctly infer RAM, for dual port en true dual port RAM added general functions file, (used in the two RAM templates)	JonasDC	4119d 05h	/mod_sim_exp/tags/Release_1.4
55	updated resource usage in comments	JonasDC	4123d 04h	/mod_sim_exp/tags/Release_1.4
54	generic fifo design: correctrly inferred by xilinx and altera	JonasDC	4123d 04h	/mod_sim_exp/tags/Release_1.4
53	correctly inferred ram for altera dual port ram	JonasDC	4123d 11h	/mod_sim_exp/tags/Release_1.4
52	correct inferring of blockram, no additional resources.	JonasDC	4123d 11h	/mod_sim_exp/tags/Release_1.4
51	true dual port ram for xilinx	JonasDC	4123d 12h	/mod_sim_exp/tags/Release_1.4
50	added folder for ram descriptions added experimental simple dual port ram implementation for xilinx	JonasDC	4123d 12h	/mod_sim_exp/tags/Release_1.4
47	added documentation for the IP core.	JonasDC	4203d 12h	/mod_sim_exp/tags/Release_1.4
46	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4203d 12h	/mod_sim_exp/tags/Release_1.4
45	chance run_auto port or mod_sim_exp_core to exp_m	JonasDC	4203d 12h	/mod_sim_exp/tags/Release_1.4
44	toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface	JonasDC	4207d 06h	/mod_sim_exp/tags/Release_1.4
43	made the core parameters generics	JonasDC	4207d 06h	/mod_sim_exp/tags/Release_1.4
42	corrected wrong library name for mod_sim_exp_pkg	JonasDC	4213d 13h	/mod_sim_exp/tags/Release_1.4
41	removed deprecated files from version control	JonasDC	4213d 13h	/mod_sim_exp/tags/Release_1.4
40	adjusted core instantiation to new core module name	JonasDC	4221d 17h	/mod_sim_exp/tags/Release_1.4

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[/] [mod_sim_exp/] [tags/] [Release_1.4] - Rev 64

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