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[/] [nand_controller] - Rev 14

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Rev Log message Author Age Path
14 Fixed READ_PAGE initial delay bug. Now the first byte is the first byte, not 0 :-) pradd 3349d 06h /nand_controller
13 Fixed delay handling in M_NAND_READ_PARAM_PAGE pradd 3350d 03h /nand_controller
12 Minor changes to nand_master.vhd and onfi_package.vhd.
Added documentation.		 pradd 3369d 04h /nand_controller
11 Changed io_unit data_reg assignment timing.

Added testbench.vhd.		 pradd 3372d 06h /nand_controller
10 Minor fixes. pradd 3373d 02h /nand_controller
9 Submission of actually working code :-) pradd 3373d 09h /nand_controller
8 Initial check in of nand_ctrl.vhd - this file implements the "system side" interface of the NAND
flash controller.		 pradd 3462d 05h /nand_controller
7 Added a note on clock_cycle generic signal pradd 3462d 07h /nand_controller
6 Initial check in of 'NAND_STUFF' package. pradd 3463d 03h /nand_controller
5 Added physical connection table for 'nand_io' bits/pins pradd 3463d 03h /nand_controller
4 Added some explanation regarding x8 and x16 NAND devices pinout and the way
data input/output is organized in the module.		 pradd 3463d 04h /nand_controller
3 Added CE2# - Chip Enable for second die on 8Gbit x8 devices
Added is_x16 input - indicates whether the NAND being used is x8 or x16 device
Added die_select input - selects active die (on 8GBit devices only)

Fixed nand_io[15..0] pin mux to properly support x16 devices		 pradd 3463d 04h /nand_controller
2 Initial check-in:
nand_interface.vhd - contains implementation of simplistic NAND Flash interface. Although,
the module may be used as a standalone "controller", it is suggested to use the whole package.		 pradd 3463d 07h /nand_controller
1 The project and the structure was created root 3463d 19h /nand_controller

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