URL https://opencores.org/ocsvn/next186/next186/trunk

Subversion Repositories next186

[/] [next186/] [trunk] - Rev 20

Rev	Log message	Author	Age	Path
20	Implemented the undocumented SALC instructions (SBB AL, AL without affecting the flags) Some speed improvements (separate data/address I/O path)	ndumitrache	2457d 19h	/next186/trunk
19	Add A20 address line	ndumitrache	3678d 16h	/next186/trunk
18	nicer code	ndumitrache	3981d 10h	/next186/trunk
17	fixed OV/CY flags for IMUL	ndumitrache	3989d 17h	/next186/trunk
16	fixed OV/CY flags for IMUL	ndumitrache	3989d 20h	/next186/trunk
15	doc fix	ndumitrache	4003d 11h	/next186/trunk
14	generate invalid opcode exception for MOV FS and GS	ndumitrache	4031d 09h	/next186/trunk
13	fix PUSHA SP pushed stack value, which should be the one before PUSHA	ndumitrache	4039d 20h	/next186/trunk
12	fix IDIV when Q=0	ndumitrache	4074d 13h	/next186/trunk
11	fix RET n alignment bug fix TRAP interrupt acknowledge updated specs	ndumitrache	4081d 20h	/next186/trunk
10	fixed MUL/IMUL 8bit flags bug	ndumitrache	4118d 12h	/next186/trunk
9	fixed DAA,DAS bug	ndumitrache	4136d 15h	/next186/trunk
8	fixed DIV bug (exception on sign bit)	ndumitrache	4180d 14h	/next186/trunk
7	fixed REP CMPS/SCAS bug when interrupted on the <equal> item	ndumitrache	4404d 21h	/next186/trunk
6	updated CMPS/SCAS timing	ndumitrache	4404d 21h	/next186/trunk
5	Fixed CMPS/SCAS bug when interrupted on the <equal> item	ndumitrache	4404d 21h	/next186/trunk
4	comment fix	ndumitrache	4419d 22h	/next186/trunk
3	updated comments	ndumitrache	4469d 21h	/next186/trunk
2	v1.0	ndumitrache	4470d 13h	/next186/trunk
1	The project and the structure was created	root	4470d 19h	/next186/trunk