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URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] [run] - Rev 32

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Rev Log message Author Age Path
32 i2c test case added dinesha 2726d 05h /oms8051mini/trunk/verif/run
31 I2C Master Test cases are added dinesha 2726d 23h /oms8051mini/trunk/verif/run
30 irun update dinesha 2727d 03h /oms8051mini/trunk/verif/run
29 i2c master test cased added dinesha 2727d 03h /oms8051mini/trunk/verif/run
27 I2C master is integrated dinesha 2728d 01h /oms8051mini/trunk/verif/run
25 8051 core reset active edge changed from high to low dinesha 2729d 05h /oms8051mini/trunk/verif/run
22 New C Model added dinesha 2730d 23h /oms8051mini/trunk/verif/run
19 Uart Message Handler added as register master dinesha 2744d 04h /oms8051mini/trunk/verif/run
16 .dat file is removed from svn dinesha 2752d 08h /oms8051mini/trunk/verif/run
15 Clean up dinesha 2752d 08h /oms8051mini/trunk/verif/run
14 Tb Clean up dinesha 2753d 01h /oms8051mini/trunk/verif/run
11 changed 32 bit to 8 bit register interface dinesha 2756d 00h /oms8051mini/trunk/verif/run
10 EXTERNAL ROM option is removed dinesha 2757d 10h /oms8051mini/trunk/verif/run
8 irun update for cadence flow dinesha 2767d 02h /oms8051mini/trunk/verif/run
7 Uart test case cleanup dinesha 2767d 02h /oms8051mini/trunk/verif/run
5 Irun Rename dinesha 2768d 02h /oms8051mini/trunk/verif/run
4 Irun update dinesha 2768d 02h /oms8051mini/trunk/verif/run
2 Initial version;
1. Ported from turbo8051 core data base
1. Removed the GMAC related logic and verif componets
dinesha 2769d 01h /oms8051mini/trunk/verif/run

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