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URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] [run] - Rev 32

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Rev Log message Author Age Path
32 i2c test case added dinesha 2741d 11h /oms8051mini/trunk/verif/run
31 I2C Master Test cases are added dinesha 2742d 06h /oms8051mini/trunk/verif/run
30 irun update dinesha 2742d 09h /oms8051mini/trunk/verif/run
29 i2c master test cased added dinesha 2742d 10h /oms8051mini/trunk/verif/run
27 I2C master is integrated dinesha 2743d 08h /oms8051mini/trunk/verif/run
25 8051 core reset active edge changed from high to low dinesha 2744d 12h /oms8051mini/trunk/verif/run
22 New C Model added dinesha 2746d 05h /oms8051mini/trunk/verif/run
19 Uart Message Handler added as register master dinesha 2759d 10h /oms8051mini/trunk/verif/run
16 .dat file is removed from svn dinesha 2767d 15h /oms8051mini/trunk/verif/run
15 Clean up dinesha 2767d 15h /oms8051mini/trunk/verif/run
14 Tb Clean up dinesha 2768d 07h /oms8051mini/trunk/verif/run
11 changed 32 bit to 8 bit register interface dinesha 2771d 07h /oms8051mini/trunk/verif/run
10 EXTERNAL ROM option is removed dinesha 2772d 17h /oms8051mini/trunk/verif/run
8 irun update for cadence flow dinesha 2782d 08h /oms8051mini/trunk/verif/run
7 Uart test case cleanup dinesha 2782d 08h /oms8051mini/trunk/verif/run
5 Irun Rename dinesha 2783d 08h /oms8051mini/trunk/verif/run
4 Irun update dinesha 2783d 08h /oms8051mini/trunk/verif/run
2 Initial version;
1. Ported from turbo8051 core data base
1. Removed the GMAC related logic and verif componets
dinesha 2784d 08h /oms8051mini/trunk/verif/run

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