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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_epoch_timer_ii.vhd] - Rev 223

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223 Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up. jshamlet 1522d 07h /open8_urisc/trunk/VHDL/o8_epoch_timer_ii.vhd
222 Created a modified version of the epoch timer with a 32-bit, 1-uS resolution timer/comparator. jshamlet 1522d 12h /open8_urisc/trunk/VHDL/o8_epoch_timer_ii.vhd

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