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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_hd44780_4b.vhd] - Rev 243

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224 Finished new Open8 bus record, which now includes the clock, reset and a microsecond tick. The CPU now accepts a clock and pll_locked signal, which it uses to generate the system reset in the bus record. It also contains a simple microsecond counter to feed the usec_tick in the record. This logic was removed from the real time clock and system timer entities, which now use the global version. Bus connections should be dramatically simplified, as only the read logic and interrupts are still run as separate signals. jshamlet 1677d 01h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
223 Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up. jshamlet 1677d 18h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
217 Broke out the vdsm8 as a separate entity, since it is used in several places,
Even MORE code cleanup.		 jshamlet 1678d 19h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
213 Code and comment cleanup jshamlet 1682d 20h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
194 Cleaned up licensing sections jshamlet 1692d 20h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
191 Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays.
Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.		 jshamlet 1692d 21h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
189 Merged changes from private repository,
added ceil_log2 function to Open8_pkg, since it is used to calculate RAM vectors,
cleaned up comments and removed local copies of the ceil_log2 function from peripherals.		 jshamlet 1705d 19h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd
175 Added 4 and 8-bit LCD interfaces with backlight and contrast DACs jshamlet 3043d 00h /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd

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