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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_rtc.vhd] - Rev 194

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Rev Log message Author Age Path
194 Cleaned up licensing sections jshamlet 1528d 09h /open8_urisc/trunk/VHDL/o8_rtc.vhd
191 Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays.
Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.		 jshamlet 1528d 10h /open8_urisc/trunk/VHDL/o8_rtc.vhd
190 Fixed a bug in CPU where RTI/RTS wasn't idling the instruction cache, causing intermittent failures where RTI would execute as RTS, corrupting the stack;
Fixed a bug in the real-time clock where the uSec tick generator would stop if the PIT timer value was left/set to 0x00.		 jshamlet 1540d 07h /open8_urisc/trunk/VHDL/o8_rtc.vhd
189 Merged changes from private repository,
added ceil_log2 function to Open8_pkg, since it is used to calculate RAM vectors,
cleaned up comments and removed local copies of the ceil_log2 function from peripherals.		 jshamlet 1541d 08h /open8_urisc/trunk/VHDL/o8_rtc.vhd
177 Fixed comments in RTC module jshamlet 2873d 10h /open8_urisc/trunk/VHDL/o8_rtc.vhd
176 Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval.		 jshamlet 2878d 08h /open8_urisc/trunk/VHDL/o8_rtc.vhd
172 General code cleanup jshamlet 3073d 08h /open8_urisc/trunk/VHDL/o8_rtc.vhd
168 Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several bugs in real time clock component,		 jshamlet 3907d 05h /open8_urisc/trunk/VHDL/o8_rtc.vhd
167 Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus.		 jshamlet 3915d 03h /open8_urisc/trunk/VHDL/o8_rtc.vhd

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