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[/] [open8_urisc/] [trunk] - Rev 329

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329 Added a core that specifically supports the task switcher software. It merges o8_int_mgr16 with a wide register, allowing full control of I/O peripherals by the task switcher software. This also allows the task switcher to be enabled for the full 16 I/O write qualification lines, which had previously only been supported in the task data setup. jshamlet 253d 15h /open8_urisc/trunk
328 Documentation cleanup. Also added operand definitions. jshamlet 254d 12h /open8_urisc/trunk
327 More bug fixes:
Added write qual line to LTC2355 interface, fixed bug where output data was duplicating the lower byte in the averager, added an initial romtape.hex file
jshamlet 254d 17h /open8_urisc/trunk
326 Minor comment correction jshamlet 260d 14h /open8_urisc/trunk
325 Added the rest of the initializers to the signal assignments jshamlet 260d 15h /open8_urisc/trunk
324 Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.

Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM.
jshamlet 260d 15h /open8_urisc/trunk
323 Forgot to add files jshamlet 261d 14h /open8_urisc/trunk
322 Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM
jshamlet 261d 14h /open8_urisc/trunk
321 Fixed issue with parity flag in receiver sticking jshamlet 365d 07h /open8_urisc/trunk
320 Inverted flow control signals to match EIA-232 specification jshamlet 367d 10h /open8_urisc/trunk
319 Fixed off-by-one error in channel count jshamlet 368d 13h /open8_urisc/trunk
318 Added o8_scale_conv.vhd and intdiv.vhd jshamlet 372d 15h /open8_urisc/trunk
317 Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. jshamlet 386d 12h /open8_urisc/trunk
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.
jshamlet 386d 12h /open8_urisc/trunk
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 386d 13h /open8_urisc/trunk
314 Code cleanup and added comments jshamlet 386d 14h /open8_urisc/trunk
313 Added all generics to package component jshamlet 386d 15h /open8_urisc/trunk
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation
jshamlet 386d 16h /open8_urisc/trunk
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 430d 12h /open8_urisc/trunk
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 457d 17h /open8_urisc/trunk

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