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[/] [open8_urisc] - Rev 301

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Rev	Log message	Author	Age	Path
301	Adding actual task manager files	jshamlet	850d 07h	/open8_urisc
300	Adding core task manager assembly	jshamlet	850d 07h	/open8_urisc
299	Modified the status_led.vhd to slow down the DIM50PCT signal to 1/32 instead of 1/2 for use with shift-register based discrete LEDs and added the ability to chain the toggle signal to save on resources as well as synchronize the "toggling"	jshamlet	852d 07h	/open8_urisc
298	Fixed a long-standing bug in the SBC instruction where the 1 wasn't being added to complete the 2's complement of Rn. This was causing off-by-one errors in subtraction and negating carry only subtractions.	jshamlet	853d 09h	/open8_urisc
297	Fixed register map comments	jshamlet	1143d 18h	/open8_urisc
296	Removed parallel interface from o8_vector_rx.vhd, modified vector_tx.vhd to use a generic for it's seed value, slight formatting change on o8_elapsed_usec.vhd.	jshamlet	1152d 09h	/open8_urisc
295	Undoing previous revision. UART was fine, bug reporter was not.	jshamlet	1155d 13h	/open8_urisc
294	Fixed an ancient bug in the parity logic that had the parity inverted.	jshamlet	1155d 18h	/open8_urisc
293	Fixed formatting issue in o8_sync_serial where tabs were inserted instead of spaces and fixed column spacing as a result (purely cosmetic)	jshamlet	1174d 17h	/open8_urisc
292	Updated the o8_trig_delay entity by: 1) Added a global interrupt enable, 2) Added the ability to trigger on both the pre- and post-arm trigger input 3) Added the ability to read the external input on offset 7	jshamlet	1245d 17h	/open8_urisc
291	Added Notepad++ language definition file for the Open8_II ISA	jshamlet	1288d 07h	/open8_urisc
290	Added an additional generic "Rotation_Ignores_Carry" that removes the carry logic from the ROL/ROR instructions such that they now rotate 'normally', Added an alias for PSR_GP4 named PSR_S, as it is now used to switch the function of the RSP instruction. The internal opcode hasn't changed, but it allows assembly code to use PSR_S or BRS/BNS when performing RSP related operations.	jshamlet	1288d 07h	/open8_urisc
289	Added back the delay for the cursor home command, since it is slow on most Hitachi compatible LCD panels.	jshamlet	1305d 18h	/open8_urisc
288	Removed hard-wired R/Wn output and replaced it with a note that the R/Wn line must be tied low either in firmware or on the board.	jshamlet	1306d 14h	/open8_urisc
287	Fixed mangled comments and revisioning dates.	jshamlet	1307d 13h	/open8_urisc
286	Added initial cut of a "universal" character LCD driver. Allows for adjustment of address setup, enable high, and cycle times. Also has built-in timers for handling timing on certain commands.	jshamlet	1307d 14h	/open8_urisc
285	Added checksum byte to vector tx/rx to avoid issues with serial line noise glitching the receiver. Also modified the transmitted to take any generic argument, rather than canned arguments.	jshamlet	1314d 17h	/open8_urisc
284	Corrected the vhdl unit name and description for o8_7seg.vhd	jshamlet	1428d 04h	/open8_urisc
283	Altered SDLC bitclock check on TX to NOT block when tested by software, but to instead ignore packet write requests if BClk_Okay is low. This allows software to continue checking BClk_Okay in a polling loop.	jshamlet	1431d 15h	/open8_urisc
282	Modified the SDLC core transmit states to have consistent naming.	jshamlet	1431d 16h	/open8_urisc

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[/] [open8_urisc] - Rev 301

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