OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc] - Rev 324

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
324 Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.

Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM.
jshamlet 268d 09h /open8_urisc
323 Forgot to add files jshamlet 269d 07h /open8_urisc
322 Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM
jshamlet 269d 07h /open8_urisc
321 Fixed issue with parity flag in receiver sticking jshamlet 373d 00h /open8_urisc
320 Inverted flow control signals to match EIA-232 specification jshamlet 375d 03h /open8_urisc
319 Fixed off-by-one error in channel count jshamlet 376d 06h /open8_urisc
318 Added o8_scale_conv.vhd and intdiv.vhd jshamlet 380d 09h /open8_urisc
317 Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. jshamlet 394d 05h /open8_urisc
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.
jshamlet 394d 05h /open8_urisc
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 394d 06h /open8_urisc
314 Code cleanup and added comments jshamlet 394d 07h /open8_urisc
313 Added all generics to package component jshamlet 394d 09h /open8_urisc
312 Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation
jshamlet 394d 09h /open8_urisc
311 Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit jshamlet 438d 05h /open8_urisc
310 Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. jshamlet 465d 11h /open8_urisc
309 Comment cleanup jshamlet 475d 18h /open8_urisc
308 jshamlet 487d 01h /open8_urisc
307 Fixed comments on o8_version.vhd jshamlet 694d 10h /open8_urisc
306 Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK jshamlet 698d 12h /open8_urisc
305 More code cleanup - rearranged macros and moved stack init to separate macro jshamlet 698d 12h /open8_urisc

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.