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[/] [openarty/] [trunk/] [sw/] [host/] [regdefs.cpp] - Rev 30

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30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 2774d 11h /openarty/trunk/sw/host/regdefs.cpp
18 The device can now program and configure itself, allowing bootstrap possibilities.
`
dgisselq 2839d 11h /openarty/trunk/sw/host/regdefs.cpp
14 All changes made as a part of getting the flash driver up and running. Today,
it successfully programmed a configuration into the Arty via wbprogram, so ...
that's been my last/best test.
dgisselq 2841d 12h /openarty/trunk/sw/host/regdefs.cpp
6 Minor updates, mostly to support the development of the DDR3 SDRAM--such
as creating addresses for the debugging scope used to figure out what's
going on with it.
dgisselq 2842d 15h /openarty/trunk/sw/host/regdefs.cpp
4 Initial host software pack. dgisselq 2857d 18h /openarty/trunk/sw/host/regdefs.cpp

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