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[/] [openmsp430/] [trunk/] [core] - Rev 95

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95 Update some test patterns for the additional simulator supports. olivier.girard 4883d 16h /openmsp430/trunk/core
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4883d 16h /openmsp430/trunk/core
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4887d 17h /openmsp430/trunk/core
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4910d 14h /openmsp430/trunk/core
85 Diverse RTL cosmetic updates. olivier.girard 4910d 16h /openmsp430/trunk/core
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4915d 17h /openmsp430/trunk/core
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4964d 23h /openmsp430/trunk/core
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4976d 17h /openmsp430/trunk/core
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4981d 16h /openmsp430/trunk/core
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5063d 17h /openmsp430/trunk/core
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5088d 17h /openmsp430/trunk/core
72 Expand configurability options of the program and data memory sizes. olivier.girard 5090d 18h /openmsp430/trunk/core
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5238d 01h /openmsp430/trunk/core
67 Added 16x16 Hardware Multiplier. olivier.girard 5238d 01h /openmsp430/trunk/core
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5238d 05h /openmsp430/trunk/core
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5248d 15h /openmsp430/trunk/core
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5259d 01h /openmsp430/trunk/core
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5259d 01h /openmsp430/trunk/core
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5259d 03h /openmsp430/trunk/core
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5269d 16h /openmsp430/trunk/core

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