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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [dbg_uart_tasks.v] - Rev 136

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136 Update all FPGA projects with the latest core version. olivier.girard 4468d 16h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/dbg_uart_tasks.v
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 4831d 15h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/dbg_uart_tasks.v

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