OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [sim/] [rtl_sim/] [src/] [submit.f] - Rev 212

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
212 Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains. olivier.girard 3286d 13h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f
202 Add DMA interface support + LINT cleanup olivier.girard 3425d 03h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f
167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.
olivier.girard 4362d 03h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f
162 Add some more SVN ignore patterns.
Update testbench.
olivier.girard 4414d 02h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f
157 Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come).... olivier.girard 4414d 02h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.