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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board] - Rev 91

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91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4912d 05h /openmsp430/trunk/fpga/xilinx_diligent_s3board
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4935d 02h /openmsp430/trunk/fpga/xilinx_diligent_s3board
85 Diverse RTL cosmetic updates. olivier.girard 4935d 03h /openmsp430/trunk/fpga/xilinx_diligent_s3board
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4940d 05h /openmsp430/trunk/fpga/xilinx_diligent_s3board
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 5001d 05h /openmsp430/trunk/fpga/xilinx_diligent_s3board
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5088d 05h /openmsp430/trunk/fpga/xilinx_diligent_s3board
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5113d 05h /openmsp430/trunk/fpga/xilinx_diligent_s3board
72 Expand configurability options of the program and data memory sizes. olivier.girard 5115d 06h /openmsp430/trunk/fpga/xilinx_diligent_s3board
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5262d 04h /openmsp430/trunk/fpga/xilinx_diligent_s3board
61 Update openMSP430 rtl. olivier.girard 5294d 02h /openmsp430/trunk/fpga/xilinx_diligent_s3board
59 Update the FPGA projects with the latest core design updates. olivier.girard 5296d 01h /openmsp430/trunk/fpga/xilinx_diligent_s3board
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5301d 06h /openmsp430/trunk/fpga/xilinx_diligent_s3board
40 Minor updates. olivier.girard 5330d 03h /openmsp430/trunk/fpga/xilinx_diligent_s3board
39 Update FPGA projects with new openMSP430 core. olivier.girard 5330d 03h /openmsp430/trunk/fpga/xilinx_diligent_s3board
37 olivier.girard 5330d 04h /openmsp430/trunk/fpga/xilinx_diligent_s3board
36 Remove old core version. olivier.girard 5330d 04h /openmsp430/trunk/fpga/xilinx_diligent_s3board
28 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5340d 12h /openmsp430/trunk/fpga/xilinx_diligent_s3board
26 Xilinx implementation example:
- update the project directory structure.
- make a local copy of the openMSP430 core to make the project self contained.		 olivier.girard 5340d 12h /openmsp430/trunk/fpga/diligent_s3board
25 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5430d 10h /openmsp430/trunk/fpga/diligent_s3board
24 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5430d 10h /openmsp430/trunk/fpga/diligent_s3board

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