OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430] - Rev 224

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
224 Update typo in the instruction length table documentation. olivier.girard 2895d 06h /openmsp430
223 Adjust register mapping of FRAME_SELECT olivier.girard 2927d 06h /openmsp430
222 Update to latest openGFX430 version. Update 2BPP demo. olivier.girard 2928d 07h /openmsp430
221 Move old Altera-DE1 project to the OBSOLETE directory.
Create new Altera-DE0-Nano-SoC project, also containing a small demo of the openGFX430 graphic controller.		 olivier.girard 3005d 07h /openmsp430
220 Create OBSOLETE directory to store old FPGA projects olivier.girard 3005d 08h /openmsp430
219 Update overview html file olivier.girard 3021d 08h /openmsp430
218 Update Tools Changelog olivier.girard 3021d 08h /openmsp430
217 Update openmsp430-gdb-proxy tool to fix Get Register procedure when using the TI GDB (thanks to Simon Fröhlich for this one). olivier.girard 3021d 08h /openmsp430
216 Add new donate picture. olivier.girard 3021d 08h /openmsp430
215 Update ChangeLog olivier.girard 3163d 09h /openmsp430
214 Fix multiwindow environment issue & close window with 'X'. Thanks to Fabian Mauroner for this one olivier.girard 3163d 09h /openmsp430
213 Update ChangeLogs olivier.girard 3279d 18h /openmsp430
212 Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains. olivier.girard 3279d 18h /openmsp430
211 Add custom printf function to reduce program memory footprint (the TI/RH GCC version is huge). Note that this function was created by DJ Delorie ( http://www.delorie.com/ ) olivier.girard 3279d 18h /openmsp430
210 Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection of debug ports for OS-X. olivier.girard 3279d 19h /openmsp430
209 Update ChangeLogs olivier.girard 3307d 08h /openmsp430
208 Update tools to run with latest CPU core version. olivier.girard 3307d 08h /openmsp430
207 Simulation now works seamlessly under Linux, OS-X and Windows (Cygwin) olivier.girard 3307d 08h /openmsp430
206 Update ChangeLog olivier.girard 3404d 08h /openmsp430
205 Thanks again to Johan W. good feedback, the following updates are implemented:
- Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment.
- Update oscillators enable generation to relax a critical timing paths in the ASIC version.
- Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).		 olivier.girard 3404d 08h /openmsp430

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.