OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 480

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 5049d 17h /openrisc
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 5050d 16h /openrisc
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 5052d 08h /openrisc
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.
julius 5052d 16h /openrisc
476 ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. julius 5053d 09h /openrisc
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 5053d 12h /openrisc
474 uC/OS-II port linker flags updated. julius 5053d 17h /openrisc
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5054d 12h /openrisc
472 Various changes which improve the quality of the tracing. jeremybennett 5054d 13h /openrisc
471 Adding ucos-ii port. julius 5056d 16h /openrisc
470 ORPSoC OR1200 crt0 updates. julius 5057d 12h /openrisc
469 newlib update - added zeroing of r0 to crt0.S julius 5058d 13h /openrisc
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 5058d 13h /openrisc
467 ORPmon - bug fixes and clean up. julius 5059d 10h /openrisc
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README
julius 5059d 16h /openrisc
465 ORPSoC SPI flash load Makefile and README updates. julius 5060d 06h /openrisc
464 More ORPmon updates. julius 5060d 07h /openrisc
463 ORPmon update julius 5060d 10h /openrisc
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.
julius 5060d 15h /openrisc
461 Updated to be much stricter about usage. jeremybennett 5062d 10h /openrisc

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.