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Subversion Repositories openrisc

[/] [openrisc/] [branches/] [or1200_rel3/] [rtl/] [verilog] - Rev 260

Rev	Log message	Author	Age	Path
260	Fixed `define in FPU that didnt need to be there	julius	5092d 18h	/openrisc/branches/or1200_rel3/rtl/verilog
259	Fixing or1200_defines FPU module selection defines - They are no longer needed	julius	5094d 14h	/openrisc/branches/or1200_rel3/rtl/verilog
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5094d 14h	/openrisc/branches/or1200_rel3/rtl/verilog
187	Or1200 sprs FPU update	julius	5144d 19h	/openrisc/branches/or1200_rel3/rtl/verilog
186	OR1200 RTL FPU fix - RF writeback signal working properly again	julius	5144d 21h	/openrisc/branches/or1200_rel3/rtl/verilog
185	Adding single precision FPU to or1200, initial checkin, not fully tested yet	julius	5144d 22h	/openrisc/branches/or1200_rel3/rtl/verilog
151	OR1200 rel3 (added some files that were not checked-in earlier)	marcus.erlandsson	5153d 18h	/openrisc/branches/or1200_rel3/rtl/verilog
142	added OpenRISC version rel3	marcus.erlandsson	5156d 02h	/openrisc/branches/or1200_rel3/rtl/verilog
141	added OpenRISC version rel3	marcus.erlandsson	5156d 02h	/openrisc/branches/or1200_rel3/rtl/verilog
10	or1200 added from or1k subversion repository	unneback	5557d 06h	/openrisc/branches/or1200_rel3/rtl/verilog